The field of integrated circuits has long struggled with automating the design of analog circuits. This is due to the complexity of circuit specifications and the vast design space. Previous research has mainly focused on automating transistor sizing within a given circuit topology. However, this paper introduces a new approach called the Circuit Graph Neural Network (CktGNN), which simultaneously automates circuit topology generation and device sizing using encoder-dependent optimization subroutines. CktGNN represents circuit graphs using a two-level GNN framework, where circuits are encoded as combinations of subgraphs in a known subgraph basis. This approach improves design efficiency by reducing the number of subgraphs required for message passing.
One major challenge in advancing learning-assisted circuit design automation is the lack of public benchmarks for assessment and reproducible research. To address this, the authors have created the Open Circuit Benchmark (OCB), an open-sourced dataset containing 10,000 distinct operational amplifiers with carefully-extracted circuit specifications. OCB also includes circuit generation and evaluation capabilities, allowing it to be used to design various analog circuits and generate corresponding datasets.
Experiments conducted on OCB demonstrate the significant advantages of CktGNN over other powerful GNN baselines and human expert manual designs. This work opens up possibilities for learning-based open-sourced design automation in the field of analog circuits. The source code for CktGNN is available at https://github.com/zehao-dong/CktGNN.